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Low Power Design Strategies for Wireless Devices

Low power design is the biggest technical challenge facing the next generation of consumer silicon. Managing the soaring development costs of that silicon is the biggest commercial challenge.
As next generation mobile phones evolve from supporting only voice transmission to the transmission of audio, images and video, substantial baseband processing power will be required to handle the increased digital transmission, reception, compression and decompression of substantially larger data streams. General Packet Radio Service (GPRS) and High Speed Circuit Switched Data (HSCSD) use multiple time slots, processed in parallel to increase the data rate. They increase baseband processing alone by a factor of eight and they are becoming standard features in today’s mobile phones.
If handsets were neither handheld nor cost sensitive, adding these features would be a matter of either turning up the processing clock or using a more powerful processor in the phone. Sadly, these solutions are unacceptable in the handset market because they will increase power consumption, product size, and/or product cost. Product cost and battery life are the two most important attributes of a mobile handset. Wireless service providers commonly give handsets to end-users for free in order to get customers. Since the providers give the phones away, they want the cheapest implementation consistent with acceptable performance. After cost, the most important features are standby time, talk time and the phone’s feature set, in that order. The phones with the longest battery life and the smallest overall size command the highest prices. The question is how a designer meets increasing processing requirements for next generation phones without sending power consumption, cost, or end-product size through the roof.
Traditionally, performance increases have been achieved in one of three ways:
1) increasing the clock frequency;
2) adding extra processors; or
3) selecting a more powerful (and more expensive) highly parallel processor with a memory-hungry instruction set.

Increasing the clock frequency can require a higher supply voltage that increases the power consumption exponentially. Some processors enable increased performance at lower clock speeds, but they are expensive from a total system point of view since they cost more and require substantially more program memory to store the larger instructions. Larger memory results in higher cost and greater power consumption, as well as a larger footprint design. Adding a second processor (e.g. for speech processing) again increases the cost, size and power drain of the end product. To wit, all of these traditional solutions end up destroying the most important competitive advantages of the phone - low cost and long standby and talk times.
Digital signal processing applications are full of relatively simple algorithms that are repeated over an over inside the inner loops of the code. In audio, video, or wireless baseband processing, thousands of samples must be encoded and decoded every second. Therefore, a tiny snippet of code that has as few as twenty operations can be responsible for as much as 90% of the system’s total processing requirement. Clearly, the key to improving performance is to make these code fragments as efficient as possible.
This inevitable trade-off between power and performance suggests that the traditional approach of using off-the-shelf DSP processors and cores may not be suitable when performance and cost and power consumption are equally important. Even the lowest power versions of standard DSPs consume a lot of power when the clock frequency is high enough. Power consumption of only 0.5 mW/MHz translates into 200 mW with a 200 MHz clock. A handful of standard DSPs that are fabricated in extremely small process technologies can operate with a fast clock and low power consumption. However, the processes and the devices are extremely expensive, violating the low cost rule for handsets.

Power Control Techniques in Wireless Systems
The primary goal of cellular radio systems is to provide communication services to a large number of mobile users. Due to the rapid expansion of the market in this area, the available resources have to be used efficiently. The main issue in this thesis is methods to assign appropriate transmission powers, given coarsely quantized measurements, in order to meet the quality requirements from the users despite various disturbances.

We propose a concept of a power regulator comprising the steps of estimating relevant quantities, handling quality specifications, and controlling the powers. With this setting, the power controlling component relates directly to the mainstream of the algorithms proposed to date.
For practical reasons, it is necessary to control the powers in a distributed fashion, and these distributed algorithms can be seen as local control loops. The effects of time delays and power output constraints in these loops are analyzed with respect to stability, using root locus techniques and describing functions. We emphasize the importance of identifying these time delays and constraints in order to choose the appropriate controller parameters for stable operation. The relevance of the local stability results on the overall system level is discussed, and further analyzed in a simulation environment, which has been developed.
The literature is surveyed, and the contributions are classified with respect to a common framework in order to stress their similarities and differences. We show that an integrating controller forms the basis for the most popular algorithms. Methods for convergence analysis are investigated and related to the theory of linear systems. These methods are applied when proving global convergence of the integrating controller.
The power control strategies are evaluated under more realistic circumstances in an environment simulating the operation of a GSM system. Comparing the results when using different power control algorithms we note that the proposed concept performs better than the algorithms proposed to date, both in terms of transmission quality of service and capacity.
Multiple users are accommodated through the use of time division multiplexing (with the exception of the FDD mode of UMTS) that result in pulsed transmissions such that the peak power is greater than the average power. All systems employ some form of power control which results lower power transmissions close to base stations and higher power further away (up to the maximum defined in the standard) or where there is a highly built-up environment or large topographic features.


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